Lattice Semiconductor’s new ECP5 series of FPGAs is optimised for low cost, small form factor and low power consumption. These characteristics make the ECP5 devices ideal for delivering programmable connectivity solutions to complement ASICs and ASSPs.
The ECP5 FPGAs’ specifications, such as up to 85,000 Look-Up Tables (LUTs), 3.7Mbits of embedded memory, 156 sysDSP blocks with DDR support, four 3.2Gbps SERDES channels and 365 user I/Os, are ideal for implementing common connectivity functions.
The FPGAs support a wide range of interface standards including DDR3, LPDDR3, XGMII and 7:1 LVDS, PCI Express, Ethernet (XAUI, Gigabit Ethernet and SGMII) and CPRI.
The devices are offered in various package options with a footprint ranging from 10mm x 10mm to 27mm x 27mm. They use a 1.1V core power supply, and also include support for encryption and dual-boot capabilities. Lowpower enhancements include Stand-by mode operation of the individual blocks including SERDES, dynamic I/O bank controllers, and reduced operating voltage.
Smart depopulation of balls simplifies PCB board routing and reduces cost, requiring fewer layers. The ECP5 family is supported by the Lattice Diamond™ design software, which is optimised for the cost-sensitive, low-power Lattice FPGA architectures.
- Double data-rate capability improves DSP block usage
- Single-channel SERDES functions use less than 0.25W
- Quad-channel SERDES functions use less than 0.5W
- Small-cell wireless basestations
- Industrial video cameras
- SFP network interface devices